DeepX Tapes Out DX-M2 Edge AI Chip Running 100B Parameter Models at 5 W

South Korean startup DeepX completed the tape-out of its DX-M2 edge AI accelerator. Built on a 2-nanometer process node, the chip delivers 80 TOPS and aims to operate within a 5-watt envelope. The processor targets models ranging from 20 billion to 100 billion parameters, generating between 10 and 30 tokens per second across mixture-of-experts architectures.

To overcome data transfer bottlenecks, DeepX partnered with Samsung Memory to use custom LPDDR5x processor-in-memory hardware. Company simulations indicate that moving matrix-vector multiplication directly into memory yields 6.7 times higher throughput for Llama3.1-8B. While peak PIM performance increases total power consumption by 2.7 times, DeepX expects a twofold speed increase within its baseline 5-watt limit.

DeepX is tailoring the DX-M2 for robotics, automotive systems, and AI laptops alongside Taiwanese manufacturers. The company created Newton, a robotics software library designed to replace Nvidia Isaac with equivalent API calls. DeepX is also working with Intel to connect OpenVINO into its software stack.

Modern generative AI usually relies on power-hungry data centers or high-wattage desktop GPUs, limiting local processing on mobile machines. Running models with tens of billions of parameters at single-digit wattages allows robots and drones to handle reasoning tasks without constant network connections.

The chip's design also highlights the commercial emergence of processor-in-memory technology. Computing inside memory chips resolves long-standing data bottlenecks, offering a practical alternative for hardware developers seeking higher efficiency before upcoming LPDDR6 standards arrive.